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  https://kamchihau.blogspot.com/2024/12/blog-post_14.html . Ref:  https://kamchihau.blogspot.com/2024/12/blog-post_14.html . . . . . John: Now, we study the 1st picture. Me: OK. John: A Rayleigh wave is combined with horizontal P wave and vertical S wave. Me: OK. John: The Rayleigh wave move from left to right. At terminal B, when the rayleigh wave is being affected, what will happen? . If (terminal B is affected) { P horizontal wave = compressed. S vertical wave = reflected. } .

  https://kamchihau.blogspot.com/2024/12/blog-post_8.html . Ref:  https://kamchihau.blogspot.com/2024/12/blog-post_8.html . . . . John: We study the 2nd picture. There're 2 types of loss. One is insertion loss. And, one is reflection loss.  Me: OK. . John: Insertion loss is a real loss.  Me: Why is it real loss? John: Because, part of the power of the signal enter the ground before they enter the inductor. In another words, part of the power of this signal is  attenuated. Me: OK. John: Therefore, the "power" of the signal isn't completely assigned to terminal B.  Me: OK. John: However, is "reflection loss" a real loss? Me: Not really.  John: Why not? Me: Because, the power of the signal completely pass through the inductor. It is only that when the signal is being affected at terminal B, there is a reflection. John: Such reflection isn't a real loss.

https://kamchihau.blogspot.com/2024/12/blog-post.html   . Ref:  https://kamchihau.blogspot.com/2024/12/blog-post.html . . . . John: You might read this article first. https://kamchihau.blogspot.com/2024/12/blog-post.html .  Me: OK. John: That article said "The wider the positive electrodes, the higher capacitance's response and the higher the frequency". Me: Yes,. John: However, it isn't always the case. See the 1st picture. The "ideal" width of the positive electrodes is 6mm. Of course, from 0mm to 6mm, the more close to 6 mm, the higher the response of the capacitance and the higher the frequency. However, if the width of the positive electrodes exceed the ideal width of 6mm, the response of capacitance drop and the frequency drop too. Me: Why? John: See the 2nd picture. The wider the positive electrodes, the deeper the field line. Me: OK. . the width of positive electrodes 0mm (capactiance's response = 0) 2mm (capacitance's response = 2) 4mm (cap...

https://kamchihau.blogspot.com/2024/11/httpswodewangzhishime.html . Ref:  https://kamchihau.blogspot.com/2024/11/httpswodewangzhishime.html . . . . . John: You might read this article first .  https://kamchihau.blogspot.com/2022/09/httpskamchihau_22.html . Me: OK. John: Now, we study 1st picture above. Me: OK. John: The 1st picture is like this. 1) Normally, there's a parallel electrodes between 3rd and 4th branches. However, the parallel electrodes disappear. 2) Now, there're fringing electrode formed between (1st 2nd) branch and (3rd 4th) branch. Me: OK. . John: Now, we see the 2nd picture above. There're 2 parts in this picture. They're part of left-hand side and the part of right-hand side. What's the difference between them? . 1) At the part of the left-hand side, there's a fringing electrodes. The positive electrodes of it is 2mm width. 2) At the part of the righ-hand side, there's a fringing electrodes. The positive electrodes of it is 6mm width. . ...

https://kamchihau.blogspot.com/2024/10/blog-post.html . Ref:  https://kamchihau.blogspot.com/2024/10/blog-post.html . . . . Me: The following 5 articles are about "Motor". You may take a look at them first. . 1)  https://wodewangzhishime.blogspot.com/2021/10/httpswodewangzhishime_39.html   <--- Magnetic field weakening or magnetic flux control. 2)  https://wodewangzhishime.blogspot.com/2021/11/httpswodewangzhishime_35.html   <---- A 3 Phase motor. 3)  https://wodewangzhishime.blogspot.com/2022/02/httpswodewangzhishime_11.html   <---- Circuit Resistance Up, Magnetic Flux Down. 4)  https://wodewangzhishime.blogspot.com/2021/11/httpswodewangzhishime_89.html   <----- A Motor brake. 5)  https://wodewangzhishime.blogspot.com/2021/12/dislogic.html   <---- Forward and Backward. . John:OK. Me: The topic of today is that the phase adjust the resistance. John: OK. Me: Now, we study the picture above. There're 2 circuit. They're...

  https://kamchihau.blogspot.com/2024/08/blog-post.html . Ref:  https://kamchihau.blogspot.com/2024/08/blog-post.html . . . . . John: Before we start, you might read this article ( https://wodewangzhishime.blogspot.com/2023/02/translate-selected-text.html ).  Me: OK. John: This article explain to you what is "Phase" in term of chemistry and electronics. Me: OK. John: This article say that when the current flow to the right hand side, a, b, c are at different Phases. Me: OK. John: Now, we look at the picture above. It is a circuit of AM modulator. Me: OK. . John: The message wave is at Up cycle. Me: OK. . John: Inside the Up cycle of the message wave, there're 2 carrier wave. One carrier wave is at Phase A. One carrier wave is at Phase B. Me: OK. . John: "Phase B" is high frequency. Would "Phase B" enter the output ground? Me: I say "No". Why? "Phase B" and output ground are at different phase . John: If "Phase B" doesn...

https://kamchihau.blogspot.com/2024/07/sequential-109.html . Ref:  https://kamchihau.blogspot.com/2024/07/sequential-109.html . . . . See the above picture.  There's a register called Port A.  Inside it, there're 4 fields.  Those fields are the fields of subject , interrupt, object and value. . Me: The clock line comes from the center-tap.  The clock line just "cover" the register of Port A.  The clock line never "cover" the "Overflow-area".  Therefore, Stack-overflow can't occur. Me: The principles of hacking isn't "Stack overflow". John: The overfow-area is at mask-interrupt. Me: Read this articles. ( https://wodewangzhishime.blogspot.com/2023/12/sequential-99.html ) .

  https://kamchihau.blogspot.com/2024/03/blog-post.html . Ref:  https://kamchihau.blogspot.com/2024/03/blog-post.html . . . . John: See. <  https://en.m.wikipedia.org/wiki/2024_Dhaka_Bailey_Road_fire > . 50 people died in the fire in Bangladesh. Me: OK. John: See the first picture. During the year of 2022,  Kelvin hack me and then organize a private tutorial to Daniel. . Kelvin (an America's hacker): During this tutorial, I'm gonna detailedly teach you how to hack the power plant. See.  During an "Up" cycle of alternate current, John's television is on. But, John's fan isn't on.  Why?  Daniel: I've no clue. . Kelvin: I let the 3rd branch of the up cycle of the alternate current of the electricity of John's house be down cycle. Daniel: Don't hack him. Kelvin: I hack him. And then, I organize a private tutorial for you. Shouldn't you praise me?  . . John (angry): Why do you hack me? Kelvin: I teach Daniel the hacker's techniques. ...

https://kamchihau.blogspot.com/2023/08/blog-post.html . Ref:  https://kamchihau.blogspot.com/2023/07/blog-post.html . . . . John: Have a look .  https://en.wikipedia.org/wiki/T%C3%A1mara_prison_riot . A prison of Honduras is  on flame. . 50 people  asphyxiate and were murdered. . . Me: See the 3rd images. . .  . "Grid" level 1 <----- The source of electricity. . There are  3 wave combined together.  . "Grid" level 2 <----- A principal Station. (each wave combined with 3 small wave) . "Grid" level 3 <----- A Secondary station. (each small wave combined with many extremely small wave) . "Grid" level 4 <----- A tertiary station. (each extremely small wave combined with many local wave) . Final point <------ The prison. (The local wave of the prison of Honduras) <----  Other locations aren't on flame. . Only the prison is on flame. . Hackers synthesis a wave of high voltage at the tertiary station  .

https://kamchihau.blogspot.com/2023/07/blog-post.html . Ref: https://wodewangzhishime.blogspot.com/2023/07/blog-post_31.html . . . . . What's center tap ??  Center tap is a clock line. . Look at the 3rd picture. . . The third picture is a full wave rectifier. It is same as the first picture. . . At the third picture, we have Port A , Port B and Center tap (Clock line).

  https://kamchihau.blogspot.com/2023/02/blog-post.html . Ref:  https://wodewangzhishime.blogspot.com/2024/02/httpswodewangzhishime.html . . . John: The followings are about delay circuit. You may read them first. . 1) https://wodewangzhishime.blogspot.com/2023/12/blog-post_2.html 2)  https://wodewangzhishime.blogspot.com/2023/12/sequential-94-cross.html 3)  https://wodewangzhishime.blogspot.com/2023/12/blog-post_11.html 4)  https://wodewangzhishime.blogspot.com/2023/12/blog-post_12.html 5)  https://wodewangzhishime.blogspot.com/2023/12/blog-post_13.html . Me: OK. John: Now, we start.  Me: OK. John: Look at the pictures above. What does [3][2][1][4] mean? Me: They mean 1,1,1,1 in binary term. John: OK . Of the pictures above, which picture is correct? Me: The 1st picture is correct. That mean when the left carrier wave of [2] is at up cycle, the right carrier wave of [2] is at up cycle too. . John: You're wrong. the 2nd picture is correct too. That mea...

  https://kamchihau.blogspot.com/2023/02/sequential-7.html . Ref: https://wodewangzhishime.blogspot.com/2023/02/httpswodewangzhishime.html . There're 5 conditions on which left or right shift doesn't work. . 1) The latch is being preset and clear. 2) The latch is feedbacking. 3) The latch is being level-trigger. 4) The flip flops is at the stage of toggling. 5) The commutator is idle (no up , no down) . John: We mention condition_4. . .If you input 1-1 to J-K, Q and -Q toggle. Me: In this case, no left shift, no right shift.

  https://kamchihau.blogspot.com/2022/12/tom-actually-how-many-people-in-hackers.html . Ref: https://kamchihau.blogspot.com/2022/09/httpskamchihau_22.html   . . There're 5 conditions on which left or right shift doesn't work. . 1) The latch is being preset and clear. 2) The latch is feedbacking . 3) The latch is being level-trigger. 4) The flip flops is at the stage of toggling. 5) The commutator is idle (no up , no down) . Me: Now, we mention condition_2. .  . if load-shift line = 1, serial input = true; if load-shift line = 0, parallel input = true; . . Me: If now I input 1 to the disabling point, all serial and paallel input is disabled. . John: If disabling point = 1, what happen?? . . if (disabling point = 1) { Q feed back to point A -Q feed back to point B. }

https://kamchihau.blogspot.com/2022/12/httpskamchihau_24.html Ref:  https://wodewangzhishime.blogspot.com/2022/12/i-know-everythings.html . . . . . . . John: Before we start, you may have a look at this article ( https://wodewangzhishime.blogspot.com/2022/02/the-definition-of-aliens-differing-in.html ).  Me: OK. John: Have a look at the 1st picture. There's a clock line from the RJ45. This clock line cover the register of Port A, the register of counter and the register of If-Else. Me: OK. === John: Look at the 2nd picture. It is what inside the register of If-Else. The process is that A output to the Xor gate and B output to the Xor gate too. If A is equal to B, the output of Xor gate is Zero. If the output of Xor gate is zero, the input of C is zero too. In code, it is . int compare = 32 bits. if (port A = compare ) // The Xor gate output is 0 and then the input of C is 0 too. { MOV receiver_register, the value of port A. } . Me: However, it is just a realistic expectation....

  https://kamchihau.blogspot.com/2022/12/httpskamchihau.html . Ref:  https://wodewangzhishime.blogspot.com/2022/02/httpswodewangzhishime_26.html  . . . Gap checking is used in both telecommunication and integrated circuit. . John: See this articles.  https://kamchihau.blogspot.com/2022/12/httpskamchihau.html  . It mention the gap-checking point check the gap between 2  SIM cards.  . Me: In another words, the gap-checking point check the gaps between 2 physical address. . John: You're correct. . Me: Indeed, gap-checking is needed in integrated circuit. Let me explain the above picture. John: Go ahead. Me: No matter how register 1 and register 2 are close to each others, there must be gap. John: If there's no gap between them, we can't distinguish between register 1 and register 2. Me: Excellent. . John: Now, Register 1 and 2 both output their datas on to the output line. Those datas don't directly enter the cache.  . Me (shaking head): No, they don...

  https://kamchihau.blogspot.com/2022/11/impact.html . Ref:  https://kamchihau.blogspot.com/2022/12/httpskamchihau_24.html . . . Gap Checking is applied on Integrated circuit. It is applied on telecommunication as well. In this articles, we use telecommunication as an example. . . Me: I explain the above picture.  It is the operation of telecommunication.  More specificially, the operation of wireless telecommunication. John: OK. Me: Sim card 1 and Sim card 2 are 2 physical address. No matter how close they are to each others, there is a gap. John: If there is no gap between sim card 1 and sim card 2, what will happen? Me: If there is no gap between them, we can't distinguish between physical address 1 and physical address 2. John: OK. How do they function? Me: For example, Sim card 1 and Sim card 2 "both" output their datas on the output lines. John: OK. Me: Before those datas enter the cache, those datas must enter the gap-checking point.  . John: What is the ...

  https://kamchihau.blogspot.com/2022/11/httpskamchihau_24.html Ref:  https://kamchihau.blogspot.com/2022/12/httpskamchihau.html . . . I hope you understand the above three pictures. . You can have a look.  https://wodewangzhishime.blogspot.com/2022/02/httpswodewangzhishime_26.html . Of course, the Xor gate is to check whether there is a register called register_a in the cache. . John: If there is a register called register_a in the cache, what happen?? Me: First, it set up the cache. . And then, the modulator send a signal to register_a. After the modulator, there're 3 lines. . 1) Serial / parallel input line. 2) Address line. 3) Interrupt line.. . I just assume that there're 5 fields within the register_a. . They're Subject, role, interrupt status, object, value, respectively. . Subject [register_z] Object [register_a] interrupt status [1,1,1] <--- It is an internal serial communication. . . I give you an example of internal serial communication. for (int i = 0; i...

  https://kamchihau.blogspot.com/2022/11/and-brt2-stand-for-total-breaker-1-and.html . Ref:  https://wodewangzhishime.blogspot.com/2022/02/httpswodewangzhishime_62.html .  . . .   . Me: There're 4 pictures. . We just look at the 1st picture. . When the chosen clock line is at the up cycle,  the load shift line is at the up cycle too. . . When the load shift line is at the up cycle,  Serial input is allowed and parallel input is disallowed. . John: OK. . Now, we look at the second picture.. When we parallel input, the chosen clock line is the Up cycle. . If the chosen clock line is at the Up cycle, the Parallel input is disallowed. . . How do we parallel input ?? Me: It is easily solved, . When we parallel input,  the chosen clock line is Up cycle, W e specially add a parallel input designed inverter. .  Finally, serial input is disallowed, and, parallel input is allowed.