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sequential (109) Gap checking

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https://kamchihau.blogspot.com/2024/07/sequential-109.html . Ref:  https://kamchihau.blogspot.com/2024/07/sequential-109.html . . . . See the above picture.  There's a register called Port A.  Inside it, there're 4 fields.  Those fields are the fields of subject , interrupt, object and value. . Me: The clock line comes from the center-tap.  The clock line just "cover" the register of Port A.  The clock line never "cover" the "Overflow-area".  Therefore, Stack-overflow can't occur. Me: The principles of hacking isn't "Stack overflow". John: The overfow-area is at mask-interrupt. Me: Read this articles. ( https://wodewangzhishime.blogspot.com/2023/12/sequential-99.html ) .

Sequential (108) one of the branch is at Low-Cycle

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  https://kamchihau.blogspot.com/2024/03/blog-post.html . Ref:  https://kamchihau.blogspot.com/2024/03/blog-post.html . . . . John: See. <  https://en.m.wikipedia.org/wiki/2024_Dhaka_Bailey_Road_fire > . 50 people died in the fire in Bangladesh. Me: OK. John: See the first picture. During the year of 2022,  Kelvin hack me and then teach Daniel the hacker's techniques. . Kelvin (an America's hacker): Do you wanna learn the hacker's techniques? Daniel (another America's hackers): Of course, I do wanna learn. Kelvin: Excellent. Now, I hack the power plant of Hong Kong. During an "Up" cycle of alternate current, John's television is on. But, John's fan isn't on.  Why? I let the 3rd branch of the up cycle of the alternate current of the electricity of John's house be down cycle. Daniel: Don't hack him. Kelvin: I hack him. And then, I teach you the hacker's techniques. You should  praise me. . . John (angry): Why do you hack me? Kelvi

sequential (107) Synthesis

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https://kamchihau.blogspot.com/2023/08/blog-post.html . . Ref:  https://kamchihau.blogspot.com/2023/07/blog-post.html . . . John: Have a look .  https://en.wikipedia.org/wiki/T%C3%A1mara_prison_riot . A prison of Honduras is  on flame. . 50 people  asphyxiate and were murdered. . . Me: See the third images. . .  . Grid level 1 <----- The source of electricity. . There are  3 wave combined together.  . Grid level 2 <----- A principal Station. (each wave combined with 3 small wave) . Grid level 3 <----- A Secondary station. (each small wave combined with many extremely small wave) . Grid level 4 <----- A tertiary station. (each extremely small wave combined with many local wave) . Final point <------ The prison. (The local wave of the prison of Honduras) <----  Other locations aren't on flame. . Only the prison is on flame. . Hackers synthesis a wave of high voltage at the tertiary station  .

sequential (73) RJ45 center tap (clock line)

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https://kamchihau.blogspot.com/2023/07/blog-post.html . Ref: https://wodewangzhishime.blogspot.com/2023/07/blog-post_31.html . . . . . What's center tap ??  Center tap is a clock line. . Look at the 3rd picture. . . The third picture is a full wave rectifier. It is same as the first picture. . . At the third picture, we have Port A , Port B and Center tap (Clock line).

sequential (106) Synthesis

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  https://kamchihau.blogspot.com/2023/02/blog-post.html . Ref:  https://wodewangzhishime.blogspot.com/2024/02/httpswodewangzhishime.html . . . 1) Synthesis wave is wave one plus wave two. 2) If the final point is an RJ45, nothing will be changed. .  3) However, if the final point is a normal transformer, an extreme high or low voltage will be induced. . Me: See it.  https://wodewangzhishime.blogspot.com/2024/02/httpswodewangzhishime.html . . The fire occur at the final point of Hawaii. . However, the influence may be at the mid point. . John: Where is the mid point?? . Me: See the "first" picture. . Everywhere is the mid point. . John: That mean, the synthesis wave occur everywhere. . Me: Yes,. They can occur in mid-point 1, mid-point 2, mid-point 3. . John:  See the second picture. . The green color wave is orignial and normal. . Howerver, when it is synthesis at the mid point, it become a long down cycle. .  . Me: See the third picuture. . At the  middle point, there's

sequential (20) toggle

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  https://kamchihau.blogspot.com/2023/02/sequential-7.html . Ref: https://wodewangzhishime.blogspot.com/2023/02/httpswodewangzhishime.html . There're 5 conditions on which left or right shift doesn't work. . 1) The latch is being preset and clear. 2) The latch is feedbacking. 3) The latch is being level-trigger. 4) The flip flops is at the stage of toggling. 5) The commutator is idle (no up , no down) . John: We mention condition_4. . .If you input 1-1 to J-K, Q and -Q toggle. Me: In this case, no left shift, no right shift.

sequential (25) load shift line

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  https://kamchihau.blogspot.com/2022/12/tom-actually-how-many-people-in-hackers.html . Ref: https://kamchihau.blogspot.com/2022/09/httpskamchihau_22.html   . . There're 5 conditions on which left or right shift doesn't work. . 1) The latch is being preset and clear. 2) The latch is feedbacking . 3) The latch is being level-trigger. 4) The flip flops is at the stage of toggling. 5) The commutator is idle (no up , no down) . Me: Now, we mention condition_2. .  . if load-shift line = 1, serial input = true; if load-shift line = 0, parallel input = true; . . Me: If now I input 1 to the disabling point, all serial and paallel input is disabled. . John: If disabling point = 1, what happen?? . . if (disabling point = 1) { Q feed back to point A -Q feed back to point B. }

sequential (22) load shift line

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https://kamchihau.blogspot.com/2022/12/httpskamchihau_24.html Ref:  https://wodewangzhishime.blogspot.com/2022/12/i-know-everythings.html . . . John: Look at the third picture. . If the public capacitor create an Up cycle, this up cycle will affect the Load/shift line and clock line. . Consequently, t he load-shift line become 1, Because of an inverter, parallel input is disabled and t he serial input is available. Meanwhile , the clock line become 1. . Me: In this case, the clock-line must accord with Load/shift line. . John: The serial input use this occassion to input. . Me: If the serial input miss this Up cycle, it must wait until the next Up cycle of the public capacitor.

sequential (49) Gap checking

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  https://kamchihau.blogspot.com/2022/12/httpskamchihau.html . Ref:  https://wodewangzhishime.blogspot.com/2022/02/httpswodewangzhishime_26.html  . . . Gap checking is used in both telecommunication and integrated circuit. . John: See this articles.  https://kamchihau.blogspot.com/2022/12/httpskamchihau.html  . It mention the gap-checking point check the gap between 2  SIM cards.  . Me: In another words, the gap-checking point check the gaps between 2 physical address. . John: You're correct. . Me: Indeed, gap-checking is needed in integrated circuit. Let me explain the above picture. John: Go ahead. Me: No matter how register 1 and register 2 are close to each others, there must be gap. John: If there's no gap between them, we can't distinguish between register 1 and register 2. Me: Excellent. . John: Now, Register 1 and 2 both output their datas on to the output line. Those datas don't directly enter the cache.  . Me (shaking head): No, they don't directly enter t

sequential (50) - Gap checking

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  https://kamchihau.blogspot.com/2022/11/impact.html . Ref:  https://kamchihau.blogspot.com/2022/12/httpskamchihau_24.html . . . Gap Checking is applied on Integrated circuit. It is applied on telecommunication as well. In this articles, we use telecommunication as an example. . . Me: I explain the above picture.  It is the operation of telecommunication.  More specificially, the operation of wireless telecommunication. John: OK. Me: Sim card 1 and Sim card 2 are 2 physical address. No matter how close they are to each others, there is a gap. John: If there is no gap between sim card 1 and sim card 2, what will happen? Me: If there is no gap between them, we can't distinguish between physical address 1 and physical address 2. John: OK. How do they function? Me: For example, Sim card 1 and Sim card 2 "both" output their datas on the output lines. John: OK. Me: Before those datas enter the cache, those datas must enter the gap-checking point.  . John: What is the function o

sequential (51) chosen clock line (interrupt line)

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  https://kamchihau.blogspot.com/2022/11/httpskamchihau_24.html Ref:  https://kamchihau.blogspot.com/2022/12/httpskamchihau.html . . . I hope you understand the above three pictures. . You can have a look.  https://wodewangzhishime.blogspot.com/2022/02/httpswodewangzhishime_26.html . Of course, the Xor gate is to check whether there is a register called register_a in the cache. . John: If there is a register called register_a in the cache, what happen?? Me: First, it set up the cache. . And then, the modulator send a signal to register_a. After the modulator, there're 3 lines. . 1) Serial / parallel input line. 2) Address line. 3) Interrupt line.. . I just assume that there're 5 fields within the register_a. . They're Subject, role, interrupt status, object, value, respectively. . Subject [register_z] Object [register_a] interrupt status [1,1,1] <--- It is an internal serial communication. . . I give you an example of internal serial communication. for (int i = 0; i<

sequential (53) chosen clock line (load shift line)

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  https://kamchihau.blogspot.com/2022/11/and-brt2-stand-for-total-breaker-1-and.html . Ref:  https://wodewangzhishime.blogspot.com/2022/02/httpswodewangzhishime_62.html .  . . .   . Me: There're 4 pictures. . We just look at the 1st picture. . When the chosen clock line is at the up cycle,  the load shift line is at the up cycle too. . . When the load shift line is at the up cycle,  Serial input is allowed and parallel input is disallowed. . John: OK. . Now, we look at the second picture.. When we parallel input, the chosen clock line is the Up cycle. . If the chosen clock line is at the Up cycle, the Parallel input is disallowed. . . How do we parallel input ?? Me: It is easily solved, . When we parallel input,  the chosen clock line is Up cycle, W e specially add a parallel input designed inverter. .  Finally, serial input is disallowed, and, parallel input is allowed.

sequential (34) voltage loading

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  https://kamchihau.blogspot.com/2022/11/httpskamchihau.htm . Ref:  https://wodewangzhishime.blogspot.com/2022/10/httpswodewangzhishime.html .      Me: Circuit B of the upper picture isn't loaded. Therefore, resistance of circuit A is high.  .  John:But, circuit B of the lower picture is loaded with a rectifier diodes. . Consequently, the resistance of circuit A is low.     if (circuit B = load)  {  resistance of circuit A = low;   }  else if (circuit B = unload)  {  resistance of circuit A = high;  }

sequential (62) fields

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https://kamchihau.blogspot.com/2022/11/if-you-shift-your-crime-to-third-party.html . Ref:  https://kamchihau.blogspot.com/2022/11/if-you-shift-your-crime-to-third-party.html   Me: R1,2,3,4 are registers. . They can't send anything to each other directly. . They must go through the Cache. . I assume there 're 6 fields inside a block of a cache. .  They are  1) Subject (1st round being checked),  2) Role (2nd round being set),  3) Interrupt status (2nd round being set), 4) Value type (1st round being checked),  5) Object (2nd round being set) 6) register value (2nd round being set),  . John: The checking is done once. . Later on, we don't need to check anymore, we directly do the setting .  Me: It is correct. . However, suddenly, the requirement of the Cache change into it. . 1) Subject (1st round being checked),  2) Role (2nd round being set),  3) Interrupt status (2nd round being set), 4) Value type (1st round being checked),  5) Object (2nd round being set) 6) register val