sequential (14) Cache comparison

 https://kamchihau.blogspot.com/2022/09/httpskamchihau.html

.

Ref: https://wodewangzhishime.blogspot.com/2022/02/the-definition-of-aliens-differing-in.html .

.


.

John : The picture above explains how Cache's comparison works. Both BA and CA enter the Xor gate. 

.

If (Xor gate = true)

{

Tri state buffer = true ;

if (tri state buffer = true )

{

BV input his value to CV.

CV and CV send their signals to parallel output line.

}

}

.

Me: Wait a minute.  If Bv input its value to Cv, the Clock line of RJ45 is at up cycle.  However,  if both Cv and CA send a signal to parallel output line,  the parallel output line must be in down cycle. 

.

John : Yes, you are correct.