sequential (16) Architecture of in-out
https://kamchihau.blogspot.com/2022/08/httpskamchihau_42.html
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Ref: https://kamchihau.blogspot.com/2022/08/httpskamchihau_4.html
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1) https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_15.html?m=1
2) https://kamchihau.blogspot.com/2022/08/heat-expand-cold-shrink.html?m=1
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John : The 2 articles above are the architecture of input. This article is the architecture of output.
Me: Ok.
John : See the 1st picture. It's case 1. If you put a delayed circuit there, during 1 down cycle of the Clock line of RJ45, only 1 bit can be output. It's b4.
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Me: Yes,
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John : If there's no delayed circuit, during 1 down cycle of the clock line of RJ45, all 4 bits right shift together. All 4 bits output to the output line through "B1".
Me: You mean 0.1.0.1 all put on the output line.
John : Yes,. Now, you see the 2nd picture. It's case 2. B1 output 0 individually to the output line. B2 output 1 individually to the output line. B3 output 0 individually to the output line. B4 output 1 individually to the output line.
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Me: Ok.
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John : Of Case 1 and 2, which case can result in faster operation ?
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Me: They are the same.
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John : As a result, the modern architecture tends to use 1 "line" only. We call it as an output line. In code, we have
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If (delayed circuit = true)
{
serial output
}
Else
{
parallel output.
}