sequential (106) No realistic serial circuit (delay circuit)
https://kamchihau.blogspot.com/2023/02/blog-post.html . Ref: https://wodewangzhishime.blogspot.com/2024/02/httpswodewangzhishime.html . . . John: The followings are about delay circuit. You may read them first. . 1) https://wodewangzhishime.blogspot.com/2023/12/blog-post_2.html 2) https://wodewangzhishime.blogspot.com/2023/12/sequential-94-cross.html 3) https://wodewangzhishime.blogspot.com/2023/12/blog-post_11.html 4) https://wodewangzhishime.blogspot.com/2023/12/blog-post_12.html 5) https://wodewangzhishime.blogspot.com/2023/12/blog-post_13.html . Me: OK. John: Now, we start. Me: OK. John: Look at the pictures above. What does [3][2][1][4] mean? Me: They mean 1,1,1,1 in binary term. John: OK . Of the pictures above, which picture is correct? Me: The 1st picture is correct. That mean when the left carrier wave of [2] is at up cycle, the right carrier wave of [2] is at up cycle too. . John: You're wrong. the 2nd picture is correct too. That mea...