sequential (51) chosen clock line
https://kamchihau.blogspot.com/2022/11/httpskamchihau_24.html
Ref: https://kamchihau.blogspot.com/2022/12/httpskamchihau.html .
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John: You can have a look.
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John: See the 2nd picture.
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Me: Ok.
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John: If there is a register called register_a, what will happen in the cache ?
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Me: First, it set up the cache called "register_a". And then, the cache of register_a will enter the Modulator.
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1) the cache of Data will enter the Modulator of Data.
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2) the cache of interrupt will enter the Modulator of Data as well as the Modulator of control.
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John: The modulator of data will send a signal to register_a through the data line. The signal which the Modulator of control send to register_a is (0. 1. 0)
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Me: Based on (0.1.0), the virtual chosen clock line will choose an appropriate "Real" Clock line.
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John: Ok. After the cache of register_a, there're 2 modulator and 2 lines.
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1) Data line.
2) Control line..
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I just assume that there're 2 fields within the register_a. They're interrupt, data, respectively.
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Data [01011110]
interrupt [0,1,0]
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